Lionel Da-Ros

Lionel Da-Ros

SOC Backend Engineer, Samsung Electronics
 

Currently employed at Samsung Electronics

Previous: Texas Instruments, Stepmind, STMicroelectronics

 

Previous: ENSERB

 

    Summary

    Team Leader driving 16 engineers spread over 4 different activities, strongly committed on challenges and execution. Several experiences in driving multi-cultural external developements too. Overall I have 15 years of experience in physical implementation of deep submicron mixed signal devices; with high proficiency on a wide range of EDA tools (Magma, Cadence, Synopsys, Mentor Graphics, Apache, Avanti, Azuro) and expertise on all aspects of the backend flow from RTLto GDSII.

Experiences

SOC Backend Engineer

At Samsung Electronics

From September 2013 to Present
Responsible for the RTL2GDSII flow of several hard macros used in a top level ModApp device (hierarchical approach which guarantees very small development time).
 

Physical Design Team Leader

At Texas Instruments

From October 2012 to June 2013
Manage16 people in the physical implementation of the 28nm OMAP5470 System on Chip, so covering all steps from RTL to GDSII: Synthesis, Floorplan, Power routing, Dynamic and Static Irdrop, signal Integrity and reliability checks, Place&Route flow (including CTS and timing closure), timing and...
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Place & Route Team Leader

At Texas Instruments

From October 2010 to October 2012
Planned activities and led 3 people in the Place & Route of the OMAP5430 integrated circuit (processor for wireless applications), first device implemented with the newest 28nm TI technology: multimillion gates, ARM A15 dual core at 2GHz, IMAGINATION SGX544 MP2 dual core, low power, multi...
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Physical Design Implementation Responsible

At Texas Instruments

From January 2002 to October 2010
Lead some hard macros external developments (India and Israel) and put in place a tactical flow from implementation to verification thus being able to hide, but still use, all TI confidential power management features (also drove the tactical memory development which was needed). Responsible for...
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Backend flow Owner

At Stepmind

From May 2001 to December 2001
- Fully defined and put in place a Backend flow (Netlist2gdsii) based on TSMC technology and Cadence Place & Route tool. Set the libraries and technology files, tuned the scripts provided by the vendor to meet Quality of Results. Had to benchmark several DRC/LVS tools ( Dracula, Assura and Calibre)...
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Mixed Signal BackEnd engineer

At STMicroelectronics

From April 1999 to April 2001
Accomplished the layout of several mixed signal hard macros and devices from 0.35um to 0.18um technologies: responsible for floorplan, Place & Route, timing closure, parasitic extraction and SDF generation, DRC, LVS, Antenna and signal electro-migration. Drove the full physical implementation of...
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ENSERB, Talence

Engineer, ENSERB

From September 1995 to June 1998
MicroElectronique
 

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